Zehuan Zhang

I’m a third year PhD student in the Department of Computing at Imperial College London, supervised by Prof. Wayne Luk. I obtained my Master degree (supervised by Prof. Qiang Liu) in 2022 and Bachelor degree in 2019 from Tianjin University. My research focuses on algorithm-hardware co-design, architecture design, design automation for trustworthy AI, and LLM acceleration.

I am currently looking for internship and full-time opportunities in hardware acceleration and AI systems in the UK/US.

News!

📄 2026/02: Our recent work on algorithm-hardware co-design for trustworthy AI in the complex-valued domain has been accepted by DAC’26.

• The work introduces Bayesian complex-valued neural networks and FPGA-oriented acceleration for efficient complex-valued uncertainty estimation.

📝 2025/11: I am invited to serve as a reviewer for FCCM’26.

📝 2025/11: I am invited to serve as a reviewer for DAC’26.

📝 2025/06: I am invited to serve as a reviewer for ACM Transactions on Reconfigurable Technology and Systems.

📄 2024/05: Our work on accelerating MRI uncertainty estimation with mask-based Bayesian neural networks has been accepted by ASAP’24.

• The work develops a software-hardware co-design flow and an FPGA accelerator for efficient uncertainty estimation in IVIM MRI.

📄 2024/02: Our work on hardware-aware neural dropout search for reliable uncertainty prediction on FPGA has been accepted by DAC’24.

• The work searches layer-wise dropout configurations under accuracy, calibration, uncertainty, and hardware-cost objectives.

📄 2024/02: One paper has been accepted by ISMRM’24.

🎓 2023/04: I joined Imperial College London as a PhD student in the Department of Computing.

📄 2023/02: One paper has been accepted by ISMRM’23.